Dr. Aravind Dasu,
Director, Micron Research Center
Aravind Dasu has a Bachelor in Electronics from Bangalore University, India (1997), an MS and a PhD in Electrical Engineering from Arizona State University (2000, 2004). He has been an Assistant Professor with the Electrical and Computer Engineering department at Utah State University since 2004. In 2008 he was the recipient of Outstanding Researcher of the Year award from the ECE department. His research is funded by grants from NASA, the Micron Technology Foundation, the State of Utah’s Centers of Excellence Program, Lockheed Martin, Xilinx and Starbridge systems. He has authored seven journal papers and over twenty conference papers. His research interests include 3D IC technologies, soft error correction and reconfigurable processing. He is a member of the IEEE and ACM.
Dr. David Peak, Micron Professor
Dr David Peak has a B.S. in Physics from the State University College at New Paltz, NY, (1965); and a Ph.D. in Physics, State University of New York at Albany, (1969). He has held positions as an Instructor, SUNYA, 1971-75; Assistant Professor (1975-78), Associate Professor (1978-85), Professor (1985-87), and Frank and Marie Louise Bailey Professor of Physics (1987-96), Union College, Schenectady, NY; Visiting Fellow (1978-79), Physics Department, Princeton University, Princeton, NJ; Visiting Scientist (1983-84), Argonne National Laboratory, Argonne, IL; E. Clairborne Robins Distinguished University Professor of Science (1992-93), University of Richmond, Richmond, VA; Professor of Physics (1996-present), Utah State University (USU), Logan, UT. His professional achievements include: American Physical Society Prize for Research by a Faculty Member at an Undergraduate Institution (1996); University Outstanding Teacher (1973), SUNYA; Outstanding Faculty Member (1990), Union; University Outstanding Adviser (2008), USU; research subject of articles in Discover Magazine (1992), Science News (2004), Mathematical Calendar (2006); 25 competitive grants. Books and publications: Komplexität: das gezähmte Chaos (1995) (with Michael Frame and Anita Ehlers), Chaos Under Control: The Art and Science of Complexity (1994) (with Michael Frame); 51 refereed publications. His research interests include: computation in biology and biology in computation. He is a member of the American Physical Society, and American Association of Physics Teachers.
Dr. Todd Moon, Micron Professor
Todd Moon is a Professor of Electrical and Computer Engineering. His area of research is in digital communications and signal processing, where he has done research in the areas of speech recognition, data compression, error correction coding, cryptography, blind source separation, and multiagent coordination. Most recently he has been investigating low density parity check codes and other iteratively decoded codes. He is the author of "Mathematical Methods and Algorithms for Signal Processing".
Juan De la Cruz
Juan De la Cruz is currently enrolled as an MS student in Computer Engineering at Utah State University. He has a BS degree in Electronics from INTEC, Dominican Republic (2006). His research interests are in the areas of Embedded Systems, Reconfigurable Computing, Digital System Design, VLSI and Computer Architectures. He is currently working in a research that involves the use of Stochastic Resonant Logic Gates to create arithmetic units and memory units that can benefit from noise in the system.
These are some of the current fields I have interests in: reconfigurable computing, fault design and testing techniques, software targeted for embedded systems, and real-time systems. My interests are changing and adapting as I discover other interesting things out there, but these are the main ones I currently am pursing. I have designed a fault injector for the Virtex-4 LX and SX chips to evaluate the new fault tolerant techniques being explored. I currently collaborate on a project that is investing bio-inspired techniques for fault toerance. I am finishing up work on a fault tolerant technique for an Iterative Repair Processor that can be adapted to other designs as well. Currently I am doing an internship at Microsoft Research in the Embedded Systems group helping with part of the toolflow for their extendible Processor (eMIPs)
Saranya is a Masters student from Electrical and Computer Engineering department, specializing in Computer Engineering. Her research interests are in the areas of computer architectures, digital system design, parallel processing and reconfigurable computing. Her current research involves compiler optimizations, error correction techniques for nano-scale SRAM cells using Cellular Automata, techniques to deploy inherent redundancies in instruction caches and data during run-time, and reconfigurable self healing cellular automata network for CMPs.
Varun Voddi is a Micron Fellow working towards his master degree in Computer Engineering. He is working with the Reconfigurable Computing Group (RCG) at Utah State University. Part of his research is on Biomimetic Cellular Computing and Validation on FPGA, which deals with the healing of errors, caused by single event upsets (SEU) and Multiple event upsets (MEU), without the use of a central controller. The results of the research is intended to be demonstrated by implemention on a Xilinx FPGA for image processing algorithms.
Andres A. Contreras
Andres Contreras is a master student in the Electrical and Computer Engineering Department. His research consists in the development of a
model to mitigate the communication problem in 3D integrated circuits caused by the breaks at the through-silicon vias (TSVs). For more details click here
BJ's current research involves error correction in distributed computational networks using self-organized collective dynamics. I am using Matlab to simulate a Cellular Neural Network architecture in which a gridwork of nodes receive information from their nearest neighbors only, but can collectively heal "errors" introduced into an otherwise uniform state distribution. My research mentor and I plan to explore the ways this architecture could be applied to new integrated circuits to correct high density thermally-induced errors, and how this architecture compares to traditional error-detection and -correction methods.