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Current Research

The goal of the Nanoelectronics Laboratory at USU is to explore the science and technology to fabricate nanometer scale electronic devices and integrated cirucits. Nanoscale electronics is already here. The smallest dimension in the Pentium-4 processer has dropped below 100nm since 2001. However, few people expect Moore's law can be continued forever. It is well known that different physics plays at different scales. For nanometer electronics to achieve or supercede the performance of their micrometer counterparts, atomic scale control of the materials and new device paradigms are in order. At USU Nanolab we focus on using STM to pattern single layer, ultra-dense 2D dopant sheets on Si surfaces, followed by Si epitaxial overgrowth to define nanoscale conducting pathways. These ultra-dense 2D dopants can provide electrons loosely confined laterally and tightly confined vertically. Gate control over lateral tunnel junctions should be possible, with many possible future applications in physics and electronics. The research objective involves multiple levels. The first level is to integrate surface science of molecular deposition and atomic lithography with epitaxial overgrowth. We intend to understand and control the interaction between dopant precursor molecules and Si atoms to pattern the ultimate delta-doped layer. The second level will develop reliable processes to make microscopically ion-implanted electrical contacts to characterize STM-fabricated nanostructures. The third level will be to study electron transport in STM-fabricated 1D and 2D dopant structures and hopefully to control lateral tunneling between them and thus the fabrication of all-epitaxial Si single electron transistors. The last level will be employing all the previous techniques to fabricate very small field effect transistors and single electron transistors based on Coulomb blocade principle. These devices can be integrated to monitor the spin state of a single qubit in a silicon quantum computer and perform alternative computational algorithms such as neruon network.

This research will touch the forefront of Si surface science, delta-doping, low-temperature Si epitaxy, low-temperature Si surface preparation, atomic level study of ion implantation, cryogenic-temperature carrier transport, Coulomb blockade, quantum cellular automata and quantum computers.

This research has been supported by a CAREER award from NSF under grant number DMR-9875129, ARDA under ARO contract number DAAD 19-00-1-0407, DARPA-QuIST under the contract number DAAD 19-01-1-0324 and NSF-NIRT under grant number CCF-0404208.

Selected publication

1. T.-C. Shen, C. Wang, G. C. Abeln, J. R. Tucker, J. W. Lyding, Ph. Avouris, R. E. Walkup, "Atomic scale desorption through electronic and vibrational excitation mechanisms", Science 268, 1590 (1995).

2. J. R. Tucker, C. Wang and T.-C. Shen,"Metal silicide patterning: a new approach to silicon nanoelectronics", Nanotechnology 7, 275 (1996).

3. Ph. Avouris, R. E. Walkup, A. R. Rossi, T.-C. Shen, G. C. Abeln, J. R. Tucker, and J. W. Lyding, "STM-induced H atom desorption from Si(100): isotope effects and site selectivity", Chem. Phys. Lett. 257, 148-154 (1996).

4. T.-C. Shen, C. Wang, and J. R. Tucker, " Al nucleation on monohydride and bare Si(001) surfaces: atomic scale patterning", Phys. Rev. Lett. 78, 1271-1274 (1997)

5. T.-C. Shen and Ph.Avouris, " Electron stimulated desorption by scanning tunneling microscope", Surf. Sci. 390, 35-44 (1997).

6. J. R. Tucker, and T.-C. Shen, "New approaches to silicon nanoelectronics", Future Electronics Device report 9 Suppl.2, 5-14 (1998).

7. J. R. Tucker and T. C. Shen, "Prospects for atomically ordered device structures based on STM lithography", Solid State Electronics 42, 1061-1067 (1998).

8. T.-C. Shen, "Role of scanning probes in nanoelectronics: a critical review", Surf. Rev. Lett. 7, 683-688 (2000).

9. J. R. Tucker and T.-C. Shen, "Can Single-Electron Integrated Circuits and Quantum Computers be Fabricated in Silicon?", Int. J. Circuit Theo. Appl. 28, 553-562 (2000).

10. T.-C. Shen, J.-Y. Ji, M. A. Zudov, R.-R. Du, J. Kline, J. R. Tucker, "Ultra-dense phosphorous delta-layer grown into silicon from PH₃ molecular precursors", Appl. Phys. Lett. 80, 1580-1582 (2002).


		Welcome to the Utah State University Nanoelectronics Laboratory nanola
Home Research Current Focus Research Highlights Teaching Group Current Members Previous Members Gallery Publications Links	Current Research The goal of the Nanoelectronics Laboratory at USU is to explore the science and technology to fabricate nanometer scale electronic devices and integrated cirucits. Nanoscale electronics is already here. The smallest dimension in the Pentium-4 processer has dropped below 100nm since 2001. However, few people expect Moore's law can be continued forever. It is well known that different physics plays at different scales. For nanometer electronics to achieve or supercede the performance of their micrometer counterparts, atomic scale control of the materials and new device paradigms are in order. At USU Nanolab we focus on using STM to pattern single layer, ultra-dense 2D dopant sheets on Si surfaces, followed by Si epitaxial overgrowth to define nanoscale conducting pathways. These ultra-dense 2D dopants can provide electrons loosely confined laterally and tightly confined vertically. Gate control over lateral tunnel junctions should be possible, with many possible future applications in physics and electronics. The research objective involves multiple levels. The first level is to integrate surface science of molecular deposition and atomic lithography with epitaxial overgrowth. We intend to understand and control the interaction between dopant precursor molecules and Si atoms to pattern the ultimate delta-doped layer. The second level will develop reliable processes to make microscopically ion-implanted electrical contacts to characterize STM-fabricated nanostructures. The third level will be to study electron transport in STM-fabricated 1D and 2D dopant structures and hopefully to control lateral tunneling between them and thus the fabrication of all-epitaxial Si single electron transistors. The last level will be employing all the previous techniques to fabricate very small field effect transistors and single electron transistors based on Coulomb blocade principle. These devices can be integrated to monitor the spin state of a single qubit in a silicon quantum computer and perform alternative computational algorithms such as neruon network. This research will touch the forefront of Si surface science, delta-doping, low-temperature Si epitaxy, low-temperature Si surface preparation, atomic level study of ion implantation, cryogenic-temperature carrier transport, Coulomb blockade, quantum cellular automata and quantum computers. This research has been supported by a CAREER award from NSF under grant number DMR-9875129, ARDA under ARO contract number DAAD 19-00-1-0407, DARPA-QuIST under the contract number DAAD 19-01-1-0324 and NSF-NIRT under grant number CCF-0404208. Selected publication 1. T.-C. Shen, C. Wang, G. C. Abeln, J. R. Tucker, J. W. Lyding, Ph. Avouris, R. E. Walkup, "Atomic scale desorption through electronic and vibrational excitation mechanisms", Science 268, 1590 (1995). 2. J. R. Tucker, C. Wang and T.-C. Shen,"Metal silicide patterning: a new approach to silicon nanoelectronics", Nanotechnology 7, 275 (1996). 3. Ph. Avouris, R. E. Walkup, A. R. Rossi, T.-C. Shen, G. C. Abeln, J. R. Tucker, and J. W. Lyding, "STM-induced H atom desorption from Si(100): isotope effects and site selectivity", Chem. Phys. Lett. 257, 148-154 (1996). 4. T.-C. Shen, C. Wang, and J. R. Tucker, " Al nucleation on monohydride and bare Si(001) surfaces: atomic scale patterning", Phys. Rev. Lett. 78, 1271-1274 (1997) 5. T.-C. Shen and Ph.Avouris, " Electron stimulated desorption by scanning tunneling microscope", Surf. Sci. 390, 35-44 (1997). 6. J. R. Tucker, and T.-C. Shen, "New approaches to silicon nanoelectronics", Future Electronics Device report 9 Suppl.2, 5-14 (1998). 7. J. R. Tucker and T. C. Shen, "Prospects for atomically ordered device structures based on STM lithography", Solid State Electronics 42, 1061-1067 (1998). 8. T.-C. Shen, "Role of scanning probes in nanoelectronics: a critical review", Surf. Rev. Lett. 7, 683-688 (2000). 9. J. R. Tucker and T.-C. Shen, "Can Single-Electron Integrated Circuits and Quantum Computers be Fabricated in Silicon?", Int. J. Circuit Theo. Appl. 28, 553-562 (2000). 10. T.-C. Shen, J.-Y. Ji, M. A. Zudov, R.-R. Du, J. Kline, J. R. Tucker, "Ultra-dense phosphorous delta-layer grown into silicon from PH₃ molecular precursors", Appl. Phys. Lett. 80, 1580-1582 (2002). 11.T.-C. Shen, J. S. Kline, T. Schenkel, S. J. Robinson, J.-Y. Ji, C. L.Yang, R. R. Du, J. R. Tucker, "Nanoscale electronics based on 2D dopant patterns in silicon", J. Vac. Sci. Technol. B 22, 3182 (2004).